fix warning
[dyninst.git] / instructionAPI / src / InstructionDecoder-aarch64.C
2016-08-21 Peter Foleyfix warning 14/head
2016-08-21 Peter Foleyfix warnings
2016-05-27 Xiaozhu MengProperly initialize decoder states for lazy operand...
2016-05-20 Sunny ShahUse the new immediate types for condition codes and...
2016-05-20 Sunny ShahFixes to correctly handle aliases in the conditional...
2016-05-20 Sunny ShahFixes for correctly handling aliases of the UBFM instru...
2016-05-20 Sunny ShahReformatted the ARM64 decoder code to have consistent...
2016-05-20 Sunny ShahFurther fixes for correctly aliasing bfm, sbfm and...
2016-05-20 Sunny ShahFixed aliasing of the bfm, sbfm and ubfm bitfield instr...
2016-05-20 Sunny ShahFixes to correctly handle stack pointer in the first...
2016-05-20 Sunny ShahFixes to correctly handle stack pointer in the destinat...
2016-05-20 Sunny ShahFixes for load/store unsigned immediate instructions
2016-05-20 Sunny ShahCorrectly handle left shift and 64-bit sign extension...
2016-05-20 Sunny ShahThe entire set of implementation defined system registe...
2016-05-06 Peter FoleyCleanup warnings
2016-03-13 Sunny ShahInstructions in the load/store category with V (bit...
2016-03-11 Sunny ShahLoad/store instructions with 7-bit immediate now have...
2016-03-11 Sunny ShahCalculation of immediate operand in logical immediate...
2016-03-08 Sunny ShahFixed missing semi-colon, and removed un-needed macros...
2016-03-08 Sunny ShahFormatting changes to about half of the file to make...
2016-03-08 Sunny ShahAll immh:immb values are valid for SIMD (non-scalar...
2016-03-01 Sunny ShahField opc with value 3 in case of load/store literal...
2016-02-29 Sunny ShahFixes to correctly handle the PRFM instruction.
2016-02-29 Sunny ShahFixes to correctly handle SIMD load/store single struct...
2016-02-29 Sunny ShahFixes to correctly handle SIMD load/store single struct...
2016-02-26 Sunny ShahFixes based on testing SIMD vector x indexed, load...
2016-02-22 Sunny ShahFixed source register addition for the SIMD table looku...
2016-02-22 Sunny ShahReplaced most asserts with a flag marking the instructi...
2016-02-19 Sunny ShahFixed detection of correct second source register for...
2016-02-18 Sunny ShahAdded support for SIMD scalar 3 same instruction category.
2016-02-16 Sunny ShahAdded logic to detect invalid instructions in the SIMD...
2016-02-16 Sunny ShahBug fixes from issues found by Nathan during fuzz testing
2016-02-12 Sunny ShahBug fixes for SIMD instruction support.
2016-02-11 Sunny ShahBug fixes and optimizations after more testing
2016-02-09 Sunny ShahFixed bugs found during testing (using the aarch64_simd...
2016-02-02 Sunny ShahAdded support for following SIMD instruction categories:
2016-01-28 Sunny ShahAdded support for the following SIMD instruction catego...
2016-01-25 Sunny ShahAdded support for following SIMD instruction categories:
2016-01-22 Sunny ShahAdded support for following SIMD instruction categories:
2016-01-20 Sunny ShahAdded support for following SIMD instruction categories:
2016-01-19 Sunny ShahAdded support for the following SIMD instruction catego...
2016-01-03 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2016-01-03 SteveXiSong fixed some compiling errors. noted what have been...
2015-12-30 SteveXiSongadd more logic for SIMD instructions
2015-12-15 Sunny ShahReverting opcode decoding logic to what we used earlier.
2015-12-08 SteveXiSongfixed a few bugs after rolling backing to weak solution...
2015-12-08 SteveXiSongupaded instructionAPI to roll back to weak solution...
2015-12-08 SteveXiSongupdated decoder-aarch64.C & .h to support LDST SIMD...
2015-12-08 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-12-08 SteveXiSongupdated decoder-aarch64 for LDST SIMD
2015-12-07 Sunny ShahModified byte-ordering used for instruction decoding...
2015-12-07 Sunny ShahFixed endian-ness of ARM.
2015-12-01 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-12-01 SteveXiSongupdated makeReg functions to support SIMD
2015-11-25 Sunny ShahUsage of the struct fields to check the instruction...
2015-11-25 Sunny ShahModified decoder and instruction table walking logic...
2015-11-24 SteveXiSongupdated the script with strict solution to aliasing
2015-11-18 SteveXiSongfixed insn_printf
2015-11-17 SteveXiSongfixed insn_print bugs
2015-11-13 SteveXiSongfixed merger conflicts
2015-11-13 SteveXiSonguncommented reorder cases for ldst and fixed a bug...
2015-11-13 Sunny ShahChanged names of right rotate, logical and arithmetic...
2015-11-13 Sunny ShahModified handling of test-and-branch instructions to...
2015-11-13 Sunny ShahFixed merge conflicts after merging with changes by...
2015-11-13 Sunny ShahAdded logic to re-order the operands after delayed...
2015-11-13 SteveXiSongcommented a line of debugging code
2015-11-13 SteveXiSongreversed the operand order and handled cases for ldst...
2015-11-13 Sunny ShahMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-11-13 Sunny ShahAdded operand re-ordering function skeleton.
2015-11-13 SteveXiSongfixed some ls/st imm values bugs
2015-11-12 Sunny ShahSupport for system registers.
2015-11-11 Sunny ShahModified logic for constructing an AST for a branch...
2015-11-10 SteveXiSongresoleved conflicts
2015-11-10 SteveXiSongcommited weak solution to aliasing
2015-11-10 Sunny ShahFixed marking of an instruction as invalid by setting...
2015-11-10 SteveXiSongfixed bad switch cases
2015-11-09 Sunny ShahFixed build issues relating to creating an immediate...
2015-11-09 Sunny ShahFixed build issues.
2015-11-06 Sunny ShahChanged initialization of condStringMap to use the...
2015-11-06 Sunny ShahMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-11-06 Sunny ShahFixed handling of option field to match decode semantic...
2015-11-05 SteveXiSongresolved conflicts
2015-11-05 SteveXiSongfixed some minor bugs for ld/st
2015-11-05 Sunny ShahFixes as part of validation.
2015-11-04 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-11-04 SteveXiSongvalidated ld class.
2015-11-04 Sunny ShahModified register names for floating point registers.
2015-11-03 SteveXiSong1.re-ordered the alias instructions as a weak solution...
2015-10-28 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-10-28 SteveXiSongmark TODO functions
2015-10-27 Sunny ShahAdded complete instruction and decoder table generated...
2015-10-27 Sunny ShahMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-10-27 Sunny ShahChanged order of start and end bit names in oeprand...
2015-10-27 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-10-27 SteveXiSongadjust the decoder generator
2015-10-27 Sunny ShahAdded support for floating point immediate instruction...
2015-10-26 SteveXiSongMerge branch 'arm64' of ssh://git.dyninst.org/pub/dynin...
2015-10-26 SteveXiSongadded functions to distinguish single precision and...
2015-10-26 Sunny ShahAdded remaining functionality for processing the option...
2015-10-23 SteveXiSongfilled operand functions for ld/st reg
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