Issue #220 (Zero register should have sizing, either XZR or WZR)
authorSunny Shah <shah28@wisc.edu>
Tue, 8 Nov 2016 17:08:56 +0000 (11:08 -0600)
committerSunny Shah <shah28@wisc.edu>
Tue, 8 Nov 2016 17:08:56 +0000 (11:08 -0600)
commitdd48e72c1520f9d7bac94005f130f701d2c14b6e
treedd3d24b1df57421363d337c886a2d6fbf3d631ac
parentd60c21bc943e800f95cc4d54fe4c21c1ee6a4902
Issue #220 (Zero register should have sizing, either XZR or WZR)

64-bit zero register is renamed from ZR to XZR.

This commit also allows the XZR register to appear in STP instructions.
common/h/dyn_regs.h
common/src/dyn_regs.C
dataflowAPI/rose/semantics/SymEvalSemantics.C
instructionAPI/src/InstructionDecoder-aarch64.C