Fixes for issues #246 (REV64 instruction operand 1 should be integer register, not...
authorSunny Shah <shah28@wisc.edu>
Wed, 3 May 2017 16:27:23 +0000 (11:27 -0500)
committerSunny Shah <shah28@wisc.edu>
Wed, 3 May 2017 16:27:23 +0000 (11:27 -0500)
commita973ef698ba22faaa658f4087541f2d7a7ef7d59
tree84ebc45c9a795c06da540570e319e4ec9e49a577
parent5e63e682ad6d46d0031939f0785dad2d068839bb
Fixes for issues #246 (REV64 instruction operand 1 should be integer register, not vector) and #250 (Reserved value for register shift field should create invalid insn)
instructionAPI/src/InstructionDecoder-aarch64.C