Added semantics for the following instructions:
authorSunny Shah <shah28@wisc.edu>
Fri, 9 Sep 2016 16:29:59 +0000 (11:29 -0500)
committerSunny Shah <shah28@wisc.edu>
Fri, 9 Sep 2016 16:29:59 +0000 (11:29 -0500)
commit3ac05a7597024895d504adcc2c74ec75d873f02a
treee499eb67492e1c15f09279ffc4e76a9e238e8985
parentd087ef0ac96c21eaca191c744d220080c2b58840
Added semantics for the following instructions:

* Immediate and register variants of LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW, STR, STRB, STRH
* Literal variants of LDR and LDRSW

The signatures of readMemory() and writeMemory() in SymEvalSemantics::StateARM64 and SymEvalSemantics::MemoryStateARM64 are modified to be able to pass in the read and write sizes.
dataflowAPI/rose/semantics/DispatcherARM64.C
dataflowAPI/rose/semantics/DispatcherARM64.h
dataflowAPI/rose/semantics/SymEvalSemantics.C
dataflowAPI/rose/semantics/SymEvalSemantics.h