Merge pull request #891 from kupsch/remove-muldivfuncs
[dyninst.git] / external / rose / armv8InstructionEnum.h
1 //
2 // Created by ssunny on 5/20/16.
3 //
4
5 #ifndef ROSE_ARMV8INSTRUCTIONENUM_H
6 #define ROSE_ARMV8INSTRUCTIONENUM_H
7
8 /** ARMv8-A major register numbers */
9 enum ARMv8RegisterClass {
10     armv8_regclass_gpr,             /** Minors are ARMv8GeneralPurposeRegister */
11     armv8_regclass_simd_fpr,        /** TODO: Minors yet to be defined */
12     armv8_regclass_pstate,          /** Minor is the only one pstate register with its flags (defined in ARMv8Flag) being the only relevant fields */
13     armv8_regclass_pc,              /** Program counter, only allowed minor is 0 */
14     armv8_regclass_sp           /** Stack pointer, only allowed minor is 0 */
15 };
16
17 /** ARMv8-A general purpose registers */
18 enum ARMv8GeneralPurposeRegister {
19     armv8_gpr_r0,
20     armv8_gpr_r1,
21     armv8_gpr_r2,
22     armv8_gpr_r3,
23     armv8_gpr_r4,
24     armv8_gpr_r5,
25     armv8_gpr_r6,
26     armv8_gpr_r7,
27     armv8_gpr_r8,
28     armv8_gpr_r9,
29     armv8_gpr_r10,
30     armv8_gpr_r11,
31     armv8_gpr_r12,
32     armv8_gpr_r13,
33     armv8_gpr_r14,
34     armv8_gpr_r15,
35     armv8_gpr_r16,
36     armv8_gpr_r17,
37     armv8_gpr_r18,
38     armv8_gpr_r19,
39     armv8_gpr_r20,
40     armv8_gpr_r21,
41     armv8_gpr_r22,
42     armv8_gpr_r23,
43     armv8_gpr_r24,
44     armv8_gpr_r25,
45     armv8_gpr_r26,
46     armv8_gpr_r27,
47     armv8_gpr_r28,
48     armv8_gpr_r29,
49     armv8_gpr_r30,
50     armv8_gpr_zr
51 };
52
53 /** ARMv8-A SIMD & FP registers */
54 enum ARMv8SimdFpRegister {
55     armv8_simdfpr_v0,
56     armv8_simdfpr_v1,
57     armv8_simdfpr_v2,
58     armv8_simdfpr_v3,
59     armv8_simdfpr_v4,
60     armv8_simdfpr_v5,
61     armv8_simdfpr_v6,
62     armv8_simdfpr_v7,
63     armv8_simdfpr_v8,
64     armv8_simdfpr_v9,
65     armv8_simdfpr_v10,
66     armv8_simdfpr_v11,
67     armv8_simdfpr_v12,
68     armv8_simdfpr_v13,
69     armv8_simdfpr_v14,
70     armv8_simdfpr_v15,
71     armv8_simdfpr_v16,
72     armv8_simdfpr_v17,
73     armv8_simdfpr_v18,
74     armv8_simdfpr_v19,
75     armv8_simdfpr_v20,
76     armv8_simdfpr_v21,
77     armv8_simdfpr_v22,
78     armv8_simdfpr_v23,
79     armv8_simdfpr_v24,
80     armv8_simdfpr_v25,
81     armv8_simdfpr_v26,
82     armv8_simdfpr_v27,
83     armv8_simdfpr_v28,
84     armv8_simdfpr_v29,
85     armv8_simdfpr_v30,
86     armv8_simdfpr_v31
87 };
88
89 /** ARMv8-A fields of the Pstate register */
90 enum ARMv8PstateFields {
91     armv8_pstatefield_pstate        =   0,      /* The entire 32-bit pstate register */
92     /* Values for each enum member below match the position of the bit in the pstate register */
93     armv8_pstatefield_n             =   31,     /* The negative flag */
94     armv8_pstatefield_z             =   30,     /* The zero flag */
95     armv8_pstatefield_c             =   29,     /* The carry flag */
96     armv8_pstatefield_v             =   28      /* The overflow flag */
97 };
98
99 /** ARMv8-A instructions for the AArch64 processor mode
100  *  The enum entries are generated by the 'aarch64_manual_parser.py' script in the instructionAPI directory under Dyninst's source tree.*/
101 enum ARMv8InstructionKind {
102     rose_aarch64_op_INVALID              =   0,
103     rose_aarch64_op_extended,
104     rose_aarch64_op_abs_advsimd,
105     rose_aarch64_op_adc,
106     rose_aarch64_op_adcs,
107     rose_aarch64_op_add_addsub_ext,
108     rose_aarch64_op_add_addsub_imm,
109     rose_aarch64_op_add_addsub_shift,
110     rose_aarch64_op_add_advsimd,
111     rose_aarch64_op_addhn_advsimd,
112     rose_aarch64_op_addp_advsimd_pair,
113     rose_aarch64_op_addp_advsimd_vec,
114     rose_aarch64_op_adds_addsub_ext,
115     rose_aarch64_op_adds_addsub_imm,
116     rose_aarch64_op_adds_addsub_shift,
117     rose_aarch64_op_addv_advsimd,
118     rose_aarch64_op_adr,
119     rose_aarch64_op_adrp,
120     rose_aarch64_op_aesd_advsimd,
121     rose_aarch64_op_aese_advsimd,
122     rose_aarch64_op_aesimc_advsimd,
123     rose_aarch64_op_aesmc_advsimd,
124     rose_aarch64_op_and_advsimd,
125     rose_aarch64_op_and_log_imm,
126     rose_aarch64_op_and_log_shift,
127     rose_aarch64_op_ands_log_imm,
128     rose_aarch64_op_ands_log_shift,
129     rose_aarch64_op_asr_asrv,
130     rose_aarch64_op_asr_sbfm,
131     rose_aarch64_op_asrv,
132     rose_aarch64_op_at_sys,
133     rose_aarch64_op_b_cond,
134     rose_aarch64_op_b_uncond,
135     rose_aarch64_op_bfi_bfm,
136     rose_aarch64_op_bfm,
137     rose_aarch64_op_bfxil_bfm,
138     rose_aarch64_op_bic_advsimd_imm,
139     rose_aarch64_op_bic_advsimd_reg,
140     rose_aarch64_op_bic_log_shift,
141     rose_aarch64_op_bics,
142     rose_aarch64_op_bif_advsimd,
143     rose_aarch64_op_bit_advsimd,
144     rose_aarch64_op_bl,
145     rose_aarch64_op_blr,
146     rose_aarch64_op_br,
147     rose_aarch64_op_brk,
148     rose_aarch64_op_bsl_advsimd,
149     rose_aarch64_op_cbnz,
150     rose_aarch64_op_cbz,
151     rose_aarch64_op_ccmn_imm,
152     rose_aarch64_op_ccmn_reg,
153     rose_aarch64_op_ccmp_imm,
154     rose_aarch64_op_ccmp_reg,
155     rose_aarch64_op_cinc_csinc,
156     rose_aarch64_op_cinv_csinv,
157     rose_aarch64_op_clrex,
158     rose_aarch64_op_cls_advsimd,
159     rose_aarch64_op_cls_int,
160     rose_aarch64_op_clz_advsimd,
161     rose_aarch64_op_clz_int,
162     rose_aarch64_op_cmeq_advsimd_reg,
163     rose_aarch64_op_cmeq_advsimd_zero,
164     rose_aarch64_op_cmge_advsimd_reg,
165     rose_aarch64_op_cmge_advsimd_zero,
166     rose_aarch64_op_cmgt_advsimd_reg,
167     rose_aarch64_op_cmgt_advsimd_zero,
168     rose_aarch64_op_cmhi_advsimd,
169     rose_aarch64_op_cmhs_advsimd,
170     rose_aarch64_op_cmle_advsimd,
171     rose_aarch64_op_cmlt_advsimd,
172     rose_aarch64_op_cmn_adds_addsub_ext,
173     rose_aarch64_op_cmn_adds_addsub_imm,
174     rose_aarch64_op_cmn_adds_addsub_shift,
175     rose_aarch64_op_cmp_subs_addsub_ext,
176     rose_aarch64_op_cmp_subs_addsub_imm,
177     rose_aarch64_op_cmp_subs_addsub_shift,
178     rose_aarch64_op_cmtst_advsimd,
179     rose_aarch64_op_cneg_csneg,
180     rose_aarch64_op_cnt_advsimd,
181     rose_aarch64_op_crc32,
182     rose_aarch64_op_crc32c,
183     rose_aarch64_op_csel,
184     rose_aarch64_op_cset_csinc,
185     rose_aarch64_op_csetm_csinv,
186     rose_aarch64_op_csinc,
187     rose_aarch64_op_csinv,
188     rose_aarch64_op_csneg,
189     rose_aarch64_op_dc_sys,
190     rose_aarch64_op_dcps1,
191     rose_aarch64_op_dcps2,
192     rose_aarch64_op_dcps3,
193     rose_aarch64_op_dmb,
194     rose_aarch64_op_drps,
195     rose_aarch64_op_dsb,
196     rose_aarch64_op_dup_advsimd_elt,
197     rose_aarch64_op_dup_advsimd_gen,
198     rose_aarch64_op_eon,
199     rose_aarch64_op_eor_advsimd,
200     rose_aarch64_op_eor_log_imm,
201     rose_aarch64_op_eor_log_shift,
202     rose_aarch64_op_eret,
203     rose_aarch64_op_ext_advsimd,
204     rose_aarch64_op_extr,
205     rose_aarch64_op_fabd_advsimd,
206     rose_aarch64_op_fabs_advsimd,
207     rose_aarch64_op_fabs_float,
208     rose_aarch64_op_facge_advsimd,
209     rose_aarch64_op_facgt_advsimd,
210     rose_aarch64_op_fadd_advsimd,
211     rose_aarch64_op_fadd_float,
212     rose_aarch64_op_faddp_advsimd_pair,
213     rose_aarch64_op_faddp_advsimd_vec,
214     rose_aarch64_op_fccmp_float,
215     rose_aarch64_op_fccmpe_float,
216     rose_aarch64_op_fcmeq_advsimd_reg,
217     rose_aarch64_op_fcmeq_advsimd_zero,
218     rose_aarch64_op_fcmge_advsimd_reg,
219     rose_aarch64_op_fcmge_advsimd_zero,
220     rose_aarch64_op_fcmgt_advsimd_reg,
221     rose_aarch64_op_fcmgt_advsimd_zero,
222     rose_aarch64_op_fcmle_advsimd,
223     rose_aarch64_op_fcmlt_advsimd,
224     rose_aarch64_op_fcmp_float,
225     rose_aarch64_op_fcmpe_float,
226     rose_aarch64_op_fcsel_float,
227     rose_aarch64_op_fcvt_float,
228     rose_aarch64_op_fcvtas_advsimd,
229     rose_aarch64_op_fcvtas_float,
230     rose_aarch64_op_fcvtau_advsimd,
231     rose_aarch64_op_fcvtau_float,
232     rose_aarch64_op_fcvtl_advsimd,
233     rose_aarch64_op_fcvtms_advsimd,
234     rose_aarch64_op_fcvtms_float,
235     rose_aarch64_op_fcvtmu_advsimd,
236     rose_aarch64_op_fcvtmu_float,
237     rose_aarch64_op_fcvtn_advsimd,
238     rose_aarch64_op_fcvtns_advsimd,
239     rose_aarch64_op_fcvtns_float,
240     rose_aarch64_op_fcvtnu_advsimd,
241     rose_aarch64_op_fcvtnu_float,
242     rose_aarch64_op_fcvtps_advsimd,
243     rose_aarch64_op_fcvtps_float,
244     rose_aarch64_op_fcvtpu_advsimd,
245     rose_aarch64_op_fcvtpu_float,
246     rose_aarch64_op_fcvtxn_advsimd,
247     rose_aarch64_op_fcvtzs_advsimd_fix,
248     rose_aarch64_op_fcvtzs_advsimd_int,
249     rose_aarch64_op_fcvtzs_float_fix,
250     rose_aarch64_op_fcvtzs_float_int,
251     rose_aarch64_op_fcvtzu_advsimd_fix,
252     rose_aarch64_op_fcvtzu_advsimd_int,
253     rose_aarch64_op_fcvtzu_float_fix,
254     rose_aarch64_op_fcvtzu_float_int,
255     rose_aarch64_op_fdiv_advsimd,
256     rose_aarch64_op_fdiv_float,
257     rose_aarch64_op_fmadd_float,
258     rose_aarch64_op_fmax_advsimd,
259     rose_aarch64_op_fmax_float,
260     rose_aarch64_op_fmaxnm_advsimd,
261     rose_aarch64_op_fmaxnm_float,
262     rose_aarch64_op_fmaxnmp_advsimd_pair,
263     rose_aarch64_op_fmaxnmp_advsimd_vec,
264     rose_aarch64_op_fmaxnmv_advsimd,
265     rose_aarch64_op_fmaxp_advsimd_pair,
266     rose_aarch64_op_fmaxp_advsimd_vec,
267     rose_aarch64_op_fmaxv_advsimd,
268     rose_aarch64_op_fmin_advsimd,
269     rose_aarch64_op_fmin_float,
270     rose_aarch64_op_fminnm_advsimd,
271     rose_aarch64_op_fminnm_float,
272     rose_aarch64_op_fminnmp_advsimd_pair,
273     rose_aarch64_op_fminnmp_advsimd_vec,
274     rose_aarch64_op_fminnmv_advsimd,
275     rose_aarch64_op_fminp_advsimd_pair,
276     rose_aarch64_op_fminp_advsimd_vec,
277     rose_aarch64_op_fminv_advsimd,
278     rose_aarch64_op_fmla_advsimd_elt,
279     rose_aarch64_op_fmla_advsimd_vec,
280     rose_aarch64_op_fmls_advsimd_elt,
281     rose_aarch64_op_fmls_advsimd_vec,
282     rose_aarch64_op_fmov_advsimd,
283     rose_aarch64_op_fmov_float,
284     rose_aarch64_op_fmov_float_gen,
285     rose_aarch64_op_fmov_float_imm,
286     rose_aarch64_op_fmsub_float,
287     rose_aarch64_op_fmul_advsimd_elt,
288     rose_aarch64_op_fmul_advsimd_vec,
289     rose_aarch64_op_fmul_float,
290     rose_aarch64_op_fmulx_advsimd_elt,
291     rose_aarch64_op_fmulx_advsimd_vec,
292     rose_aarch64_op_fneg_advsimd,
293     rose_aarch64_op_fneg_float,
294     rose_aarch64_op_fnmadd_float,
295     rose_aarch64_op_fnmsub_float,
296     rose_aarch64_op_fnmul_float,
297     rose_aarch64_op_frecpe_advsimd,
298     rose_aarch64_op_frecps_advsimd,
299     rose_aarch64_op_frecpx_advsimd,
300     rose_aarch64_op_frinta_advsimd,
301     rose_aarch64_op_frinta_float,
302     rose_aarch64_op_frinti_advsimd,
303     rose_aarch64_op_frinti_float,
304     rose_aarch64_op_frintm_advsimd,
305     rose_aarch64_op_frintm_float,
306     rose_aarch64_op_frintn_advsimd,
307     rose_aarch64_op_frintn_float,
308     rose_aarch64_op_frintp_advsimd,
309     rose_aarch64_op_frintp_float,
310     rose_aarch64_op_frintx_advsimd,
311     rose_aarch64_op_frintx_float,
312     rose_aarch64_op_frintz_advsimd,
313     rose_aarch64_op_frintz_float,
314     rose_aarch64_op_frsqrte_advsimd,
315     rose_aarch64_op_frsqrts_advsimd,
316     rose_aarch64_op_fsqrt_advsimd,
317     rose_aarch64_op_fsqrt_float,
318     rose_aarch64_op_fsub_advsimd,
319     rose_aarch64_op_fsub_float,
320     rose_aarch64_op_hint,
321     rose_aarch64_op_hlt,
322     rose_aarch64_op_hvc,
323     rose_aarch64_op_ic_sys,
324     rose_aarch64_op_ins_advsimd_elt,
325     rose_aarch64_op_ins_advsimd_gen,
326     rose_aarch64_op_isb,
327     rose_aarch64_op_ld1_advsimd_mult,
328     rose_aarch64_op_ld1_advsimd_sngl,
329     rose_aarch64_op_ld1r_advsimd,
330     rose_aarch64_op_ld2_advsimd_mult,
331     rose_aarch64_op_ld2_advsimd_sngl,
332     rose_aarch64_op_ld2r_advsimd,
333     rose_aarch64_op_ld3_advsimd_mult,
334     rose_aarch64_op_ld3_advsimd_sngl,
335     rose_aarch64_op_ld3r_advsimd,
336     rose_aarch64_op_ld4_advsimd_mult,
337     rose_aarch64_op_ld4_advsimd_sngl,
338     rose_aarch64_op_ld4r_advsimd,
339     rose_aarch64_op_ldar,
340     rose_aarch64_op_ldarb,
341     rose_aarch64_op_ldarh,
342     rose_aarch64_op_ldaxp,
343     rose_aarch64_op_ldaxr,
344     rose_aarch64_op_ldaxrb,
345     rose_aarch64_op_ldaxrh,
346     rose_aarch64_op_ldnp_fpsimd,
347     rose_aarch64_op_ldnp_gen,
348     rose_aarch64_op_ldp_fpsimd,
349     rose_aarch64_op_ldp_gen,
350     rose_aarch64_op_ldpsw,
351     rose_aarch64_op_ldr_imm_fpsimd,
352     rose_aarch64_op_ldr_imm_gen,
353     rose_aarch64_op_ldr_lit_fpsimd,
354     rose_aarch64_op_ldr_lit_gen,
355     rose_aarch64_op_ldr_reg_fpsimd,
356     rose_aarch64_op_ldr_reg_gen,
357     rose_aarch64_op_ldrb_imm,
358     rose_aarch64_op_ldrb_reg,
359     rose_aarch64_op_ldrh_imm,
360     rose_aarch64_op_ldrh_reg,
361     rose_aarch64_op_ldrsb_imm,
362     rose_aarch64_op_ldrsb_reg,
363     rose_aarch64_op_ldrsh_imm,
364     rose_aarch64_op_ldrsh_reg,
365     rose_aarch64_op_ldrsw_imm,
366     rose_aarch64_op_ldrsw_lit,
367     rose_aarch64_op_ldrsw_reg,
368     rose_aarch64_op_ldtr,
369     rose_aarch64_op_ldtrb,
370     rose_aarch64_op_ldtrh,
371     rose_aarch64_op_ldtrsb,
372     rose_aarch64_op_ldtrsh,
373     rose_aarch64_op_ldtrsw,
374     rose_aarch64_op_ldur_fpsimd,
375     rose_aarch64_op_ldur_gen,
376     rose_aarch64_op_ldurb,
377     rose_aarch64_op_ldurh,
378     rose_aarch64_op_ldursb,
379     rose_aarch64_op_ldursh,
380     rose_aarch64_op_ldursw,
381     rose_aarch64_op_ldxp,
382     rose_aarch64_op_ldxr,
383     rose_aarch64_op_ldxrb,
384     rose_aarch64_op_ldxrh,
385     rose_aarch64_op_lsl_lslv,
386     rose_aarch64_op_lsl_ubfm,
387     rose_aarch64_op_lslv,
388     rose_aarch64_op_lsr_lsrv,
389     rose_aarch64_op_lsr_ubfm,
390     rose_aarch64_op_lsrv,
391     rose_aarch64_op_madd,
392     rose_aarch64_op_mla_advsimd_elt,
393     rose_aarch64_op_mla_advsimd_vec,
394     rose_aarch64_op_mls_advsimd_elt,
395     rose_aarch64_op_mls_advsimd_vec,
396     rose_aarch64_op_mneg_msub,
397     rose_aarch64_op_mov_add_addsub_imm,
398     rose_aarch64_op_mov_dup_advsimd_elt,
399     rose_aarch64_op_mov_ins_advsimd_elt,
400     rose_aarch64_op_mov_ins_advsimd_gen,
401     rose_aarch64_op_mov_movn,
402     rose_aarch64_op_mov_movz,
403     rose_aarch64_op_mov_orr_advsimd_reg,
404     rose_aarch64_op_mov_orr_log_imm,
405     rose_aarch64_op_mov_orr_log_shift,
406     rose_aarch64_op_mov_umov_advsimd,
407     rose_aarch64_op_movi_advsimd,
408     rose_aarch64_op_movk,
409     rose_aarch64_op_movn,
410     rose_aarch64_op_movz,
411     rose_aarch64_op_mrs,
412     rose_aarch64_op_msr_imm,
413     rose_aarch64_op_msr_reg,
414     rose_aarch64_op_msub,
415     rose_aarch64_op_mul_advsimd_elt,
416     rose_aarch64_op_mul_advsimd_vec,
417     rose_aarch64_op_mul_madd,
418     rose_aarch64_op_mvn_not_advsimd,
419     rose_aarch64_op_mvn_orn_log_shift,
420     rose_aarch64_op_mvni_advsimd,
421     rose_aarch64_op_neg_advsimd,
422     rose_aarch64_op_neg_sub_addsub_shift,
423     rose_aarch64_op_negs_subs_addsub_shift,
424     rose_aarch64_op_ngc_sbc,
425     rose_aarch64_op_ngcs_sbcs,
426     rose_aarch64_op_nop_hint,
427     rose_aarch64_op_not_advsimd,
428     rose_aarch64_op_orn_advsimd,
429     rose_aarch64_op_orn_log_shift,
430     rose_aarch64_op_orr_advsimd_imm,
431     rose_aarch64_op_orr_advsimd_reg,
432     rose_aarch64_op_orr_log_imm,
433     rose_aarch64_op_orr_log_shift,
434     rose_aarch64_op_pmul_advsimd,
435     rose_aarch64_op_pmull_advsimd,
436     rose_aarch64_op_prfm_imm,
437     rose_aarch64_op_prfm_lit,
438     rose_aarch64_op_prfm_reg,
439     rose_aarch64_op_prfum,
440     rose_aarch64_op_raddhn_advsimd,
441     rose_aarch64_op_rbit_advsimd,
442     rose_aarch64_op_rbit_int,
443     rose_aarch64_op_ret,
444     rose_aarch64_op_rev,
445     rose_aarch64_op_rev16_advsimd,
446     rose_aarch64_op_rev16_int,
447     rose_aarch64_op_rev32_advsimd,
448     rose_aarch64_op_rev32_int,
449     rose_aarch64_op_rev64_advsimd,
450     rose_aarch64_op_ror_extr,
451     rose_aarch64_op_ror_rorv,
452     rose_aarch64_op_rorv,
453     rose_aarch64_op_rshrn_advsimd,
454     rose_aarch64_op_rsubhn_advsimd,
455     rose_aarch64_op_saba_advsimd,
456     rose_aarch64_op_sabal_advsimd,
457     rose_aarch64_op_sabd_advsimd,
458     rose_aarch64_op_sabdl_advsimd,
459     rose_aarch64_op_sadalp_advsimd,
460     rose_aarch64_op_saddl_advsimd,
461     rose_aarch64_op_saddlp_advsimd,
462     rose_aarch64_op_saddlv_advsimd,
463     rose_aarch64_op_saddw_advsimd,
464     rose_aarch64_op_sbc,
465     rose_aarch64_op_sbcs,
466     rose_aarch64_op_sbfiz_sbfm,
467     rose_aarch64_op_sbfm,
468     rose_aarch64_op_sbfx_sbfm,
469     rose_aarch64_op_scvtf_advsimd_fix,
470     rose_aarch64_op_scvtf_advsimd_int,
471     rose_aarch64_op_scvtf_float_fix,
472     rose_aarch64_op_scvtf_float_int,
473     rose_aarch64_op_sdiv,
474     rose_aarch64_op_sev_hint,
475     rose_aarch64_op_sevl_hint,
476     rose_aarch64_op_sha1c_advsimd,
477     rose_aarch64_op_sha1h_advsimd,
478     rose_aarch64_op_sha1m_advsimd,
479     rose_aarch64_op_sha1p_advsimd,
480     rose_aarch64_op_sha1su0_advsimd,
481     rose_aarch64_op_sha1su1_advsimd,
482     rose_aarch64_op_sha256h2_advsimd,
483     rose_aarch64_op_sha256h_advsimd,
484     rose_aarch64_op_sha256su0_advsimd,
485     rose_aarch64_op_sha256su1_advsimd,
486     rose_aarch64_op_shadd_advsimd,
487     rose_aarch64_op_shl_advsimd,
488     rose_aarch64_op_shll_advsimd,
489     rose_aarch64_op_shrn_advsimd,
490     rose_aarch64_op_shsub_advsimd,
491     rose_aarch64_op_sli_advsimd,
492     rose_aarch64_op_smaddl,
493     rose_aarch64_op_smax_advsimd,
494     rose_aarch64_op_smaxp_advsimd,
495     rose_aarch64_op_smaxv_advsimd,
496     rose_aarch64_op_smc,
497     rose_aarch64_op_smin_advsimd,
498     rose_aarch64_op_sminp_advsimd,
499     rose_aarch64_op_sminv_advsimd,
500     rose_aarch64_op_smlal_advsimd_elt,
501     rose_aarch64_op_smlal_advsimd_vec,
502     rose_aarch64_op_smlsl_advsimd_elt,
503     rose_aarch64_op_smlsl_advsimd_vec,
504     rose_aarch64_op_smnegl_smsubl,
505     rose_aarch64_op_smov_advsimd,
506     rose_aarch64_op_smsubl,
507     rose_aarch64_op_smulh,
508     rose_aarch64_op_smull_advsimd_elt,
509     rose_aarch64_op_smull_advsimd_vec,
510     rose_aarch64_op_smull_smaddl,
511     rose_aarch64_op_sqabs_advsimd,
512     rose_aarch64_op_sqadd_advsimd,
513     rose_aarch64_op_sqdmlal_advsimd_elt,
514     rose_aarch64_op_sqdmlal_advsimd_vec,
515     rose_aarch64_op_sqdmlsl_advsimd_elt,
516     rose_aarch64_op_sqdmlsl_advsimd_vec,
517     rose_aarch64_op_sqdmulh_advsimd_elt,
518     rose_aarch64_op_sqdmulh_advsimd_vec,
519     rose_aarch64_op_sqdmull_advsimd_elt,
520     rose_aarch64_op_sqdmull_advsimd_vec,
521     rose_aarch64_op_sqneg_advsimd,
522     rose_aarch64_op_sqrdmulh_advsimd_elt,
523     rose_aarch64_op_sqrdmulh_advsimd_vec,
524     rose_aarch64_op_sqrshl_advsimd,
525     rose_aarch64_op_sqrshrn_advsimd,
526     rose_aarch64_op_sqrshrun_advsimd,
527     rose_aarch64_op_sqshl_advsimd_imm,
528     rose_aarch64_op_sqshl_advsimd_reg,
529     rose_aarch64_op_sqshlu_advsimd,
530     rose_aarch64_op_sqshrn_advsimd,
531     rose_aarch64_op_sqshrun_advsimd,
532     rose_aarch64_op_sqsub_advsimd,
533     rose_aarch64_op_sqxtn_advsimd,
534     rose_aarch64_op_sqxtun_advsimd,
535     rose_aarch64_op_srhadd_advsimd,
536     rose_aarch64_op_sri_advsimd,
537     rose_aarch64_op_srshl_advsimd,
538     rose_aarch64_op_srshr_advsimd,
539     rose_aarch64_op_srsra_advsimd,
540     rose_aarch64_op_sshl_advsimd,
541     rose_aarch64_op_sshll_advsimd,
542     rose_aarch64_op_sshr_advsimd,
543     rose_aarch64_op_ssra_advsimd,
544     rose_aarch64_op_ssubl_advsimd,
545     rose_aarch64_op_ssubw_advsimd,
546     rose_aarch64_op_st1_advsimd_mult,
547     rose_aarch64_op_st1_advsimd_sngl,
548     rose_aarch64_op_st2_advsimd_mult,
549     rose_aarch64_op_st2_advsimd_sngl,
550     rose_aarch64_op_st3_advsimd_mult,
551     rose_aarch64_op_st3_advsimd_sngl,
552     rose_aarch64_op_st4_advsimd_mult,
553     rose_aarch64_op_st4_advsimd_sngl,
554     rose_aarch64_op_stlr,
555     rose_aarch64_op_stlrb,
556     rose_aarch64_op_stlrh,
557     rose_aarch64_op_stlxp,
558     rose_aarch64_op_stlxr,
559     rose_aarch64_op_stlxrb,
560     rose_aarch64_op_stlxrh,
561     rose_aarch64_op_stnp_fpsimd,
562     rose_aarch64_op_stnp_gen,
563     rose_aarch64_op_stp_fpsimd,
564     rose_aarch64_op_stp_gen,
565     rose_aarch64_op_str_imm_fpsimd,
566     rose_aarch64_op_str_imm_gen,
567     rose_aarch64_op_str_reg_fpsimd,
568     rose_aarch64_op_str_reg_gen,
569     rose_aarch64_op_strb_imm,
570     rose_aarch64_op_strb_reg,
571     rose_aarch64_op_strh_imm,
572     rose_aarch64_op_strh_reg,
573     rose_aarch64_op_sttr,
574     rose_aarch64_op_sttrb,
575     rose_aarch64_op_sttrh,
576     rose_aarch64_op_stur_fpsimd,
577     rose_aarch64_op_stur_gen,
578     rose_aarch64_op_sturb,
579     rose_aarch64_op_sturh,
580     rose_aarch64_op_stxp,
581     rose_aarch64_op_stxr,
582     rose_aarch64_op_stxrb,
583     rose_aarch64_op_stxrh,
584     rose_aarch64_op_sub_addsub_ext,
585     rose_aarch64_op_sub_addsub_imm,
586     rose_aarch64_op_sub_addsub_shift,
587     rose_aarch64_op_sub_advsimd,
588     rose_aarch64_op_subhn_advsimd,
589     rose_aarch64_op_subs_addsub_ext,
590     rose_aarch64_op_subs_addsub_imm,
591     rose_aarch64_op_subs_addsub_shift,
592     rose_aarch64_op_suqadd_advsimd,
593     rose_aarch64_op_svc,
594     rose_aarch64_op_sxtb_sbfm,
595     rose_aarch64_op_sxth_sbfm,
596     rose_aarch64_op_sxtl_sshll_advsimd,
597     rose_aarch64_op_sxtw_sbfm,
598     rose_aarch64_op_sys,
599     rose_aarch64_op_sysl,
600     rose_aarch64_op_tbl_advsimd,
601     rose_aarch64_op_tbnz,
602     rose_aarch64_op_tbx_advsimd,
603     rose_aarch64_op_tbz,
604     rose_aarch64_op_tlbi_sys,
605     rose_aarch64_op_trn1_advsimd,
606     rose_aarch64_op_trn2_advsimd,
607     rose_aarch64_op_tst_ands_log_imm,
608     rose_aarch64_op_tst_ands_log_shift,
609     rose_aarch64_op_uaba_advsimd,
610     rose_aarch64_op_uabal_advsimd,
611     rose_aarch64_op_uabd_advsimd,
612     rose_aarch64_op_uabdl_advsimd,
613     rose_aarch64_op_uadalp_advsimd,
614     rose_aarch64_op_uaddl_advsimd,
615     rose_aarch64_op_uaddlp_advsimd,
616     rose_aarch64_op_uaddlv_advsimd,
617     rose_aarch64_op_uaddw_advsimd,
618     rose_aarch64_op_ubfiz_ubfm,
619     rose_aarch64_op_ubfm,
620     rose_aarch64_op_ubfx_ubfm,
621     rose_aarch64_op_ucvtf_advsimd_fix,
622     rose_aarch64_op_ucvtf_advsimd_int,
623     rose_aarch64_op_ucvtf_float_fix,
624     rose_aarch64_op_ucvtf_float_int,
625     rose_aarch64_op_udiv,
626     rose_aarch64_op_uhadd_advsimd,
627     rose_aarch64_op_uhsub_advsimd,
628     rose_aarch64_op_umaddl,
629     rose_aarch64_op_umax_advsimd,
630     rose_aarch64_op_umaxp_advsimd,
631     rose_aarch64_op_umaxv_advsimd,
632     rose_aarch64_op_umin_advsimd,
633     rose_aarch64_op_uminp_advsimd,
634     rose_aarch64_op_uminv_advsimd,
635     rose_aarch64_op_umlal_advsimd_elt,
636     rose_aarch64_op_umlal_advsimd_vec,
637     rose_aarch64_op_umlsl_advsimd_elt,
638     rose_aarch64_op_umlsl_advsimd_vec,
639     rose_aarch64_op_umnegl_umsubl,
640     rose_aarch64_op_umov_advsimd,
641     rose_aarch64_op_umsubl,
642     rose_aarch64_op_umulh,
643     rose_aarch64_op_umull_advsimd_elt,
644     rose_aarch64_op_umull_advsimd_vec,
645     rose_aarch64_op_umull_umaddl,
646     rose_aarch64_op_uqadd_advsimd,
647     rose_aarch64_op_uqrshl_advsimd,
648     rose_aarch64_op_uqrshrn_advsimd,
649     rose_aarch64_op_uqshl_advsimd_imm,
650     rose_aarch64_op_uqshl_advsimd_reg,
651     rose_aarch64_op_uqshrn_advsimd,
652     rose_aarch64_op_uqsub_advsimd,
653     rose_aarch64_op_uqxtn_advsimd,
654     rose_aarch64_op_urecpe_advsimd,
655     rose_aarch64_op_urhadd_advsimd,
656     rose_aarch64_op_urshl_advsimd,
657     rose_aarch64_op_urshr_advsimd,
658     rose_aarch64_op_ursqrte_advsimd,
659     rose_aarch64_op_ursra_advsimd,
660     rose_aarch64_op_ushl_advsimd,
661     rose_aarch64_op_ushll_advsimd,
662     rose_aarch64_op_ushr_advsimd,
663     rose_aarch64_op_usqadd_advsimd,
664     rose_aarch64_op_usra_advsimd,
665     rose_aarch64_op_usubl_advsimd,
666     rose_aarch64_op_usubw_advsimd,
667     rose_aarch64_op_uxtb_ubfm,
668     rose_aarch64_op_uxth_ubfm,
669     rose_aarch64_op_uxtl_ushll_advsimd,
670     rose_aarch64_op_uzp1_advsimd,
671     rose_aarch64_op_uzp2_advsimd,
672     rose_aarch64_op_wfe_hint,
673     rose_aarch64_op_wfi_hint,
674     rose_aarch64_op_xtn_advsimd,
675     rose_aarch64_op_yield_hint,
676     rose_aarch64_op_zip1_advsimd,
677     rose_aarch64_op_zip2_advsimd
678 };
679
680 #endif //ROSE_ARMV8INSTRUCTIONENUM_H